This invention relates to methods of packaging integrated circuits and integrated circuits so packaged, and more particularly to methods of stacking integrated circuits to form three-dimensional (3D) microelectronic packages and microelectronic packages so formed.
Integrated circuits are widely used in consumer, commercial and other applications to provide memory devices, logic devices, processor devices, sensor devices, electro-optical devices and many other microelectronic devices. Integrated circuits generally include therein large numbers of active and passive devices. An integrated circuit generally includes at least one single element and/or compound semiconductor layer. The semiconductor layer may also include a single element and/or compound semiconductor substrate, and one or more epitaxial layers. Active devices are generally formed in the semiconductor layer. A wiring layer is also provided on the semiconductor layer to provide a wiring pattern that is used to interconnect the semiconductor devices that are in the semiconductor layer and/or to provide input/output (I/O) connections to devices that are external of the integrated circuit. The wiring layer may include one or more wiring patterns that are insulated from one another and from the semiconductor layer by one or more insulating layers.
The integration density of integrated circuits continues to increase, so that more and more active and passive devices may be provided in a given integrated circuit. Additional integration density may also be provided by stacking integrated circuit substrates upon one another to provide stacked or three-dimensional (3D) integrated circuit structures. More specifically, integrated circuits may be stacked upon one another, face-to-face. These stacked devices may decrease the wiring lengths and may provide high packing density, high speed operation, low power consumption, low cost, and/or parallel processing. Stacked integrated circuits generally include a conductive via that extends through a given integrated circuit, so that both faces of the integrated circuit may be connected to other devices. Since integrated circuits often include a silicon semiconductor layer, these conductive vias that extend through the integrated circuit are often referred to as “through-silicon vias” (TSVs).
As is well known to those having skill in the art, integrated circuits are generally fabricated as wafers, in which tens, hundreds or more chips are fabricated and then singulated into individual chips. The active/passive devices may be formed in the integrated circuits at the wafer stage, and the wiring layers may also be formed on the semiconductor layer at the wafer stage. Through-silicon vias may be fabricated in the integrated circuits at the wafer stage as well, prior to forming the active devices therein and/or after forming the active devices therein. The wafers, including the through-silicon vias may then be bonded together and stacked.